1 ltc4410 sn4410 4410fs usb power manager in thinsot manages total power between a usb peripheral and battery charger minimal voltage drop (100mv at 500ma) ultralow battery drain: 1 a reverse current blocking diode not required undervoltage lockout very few external components compatible with several ltc linear battery chargers overtemperature protected dual battery charge priority management low profile (1mm) sot-23 package cellular phones pdas digital cameras mp3 players battery backup systems , ltc and lt are registered trademarks of linear technology corporation. the ltc 4410 enables simultaneous battery charging and operation of portable usb 1.0 and 2.0 compliant devices while they are connected to a usb port. as the usb periph- eral load increases, the ltc4410 proportionally reduces the battery charge current to keep the total current less than 500ma or 100ma, depending on the state of the mode pin. the ltc4410 includes a usb present output that drives an external p-channel mosfet to disconnect the battery from the usb peripheral when the usb power is valid. this allows device operation when connected to the usb port, even when the battery is deeply discharged. other features include reverse current blocking, thermal shutdown and low quiescent current (80 a in 500ma mode) that is compliant with usb suspend mode. the ltc4410 is available in the low profile (1mm) sot-23 (thinsot tm ) package. thinsot is a trademark of linear technology corporation. system load step response usb powered battery charger and power manager 200ma 240ma 440ma 0ma 0ma 5 s/div load current battery charger current 4410 ta02 4.7 f 4.7 f 0.1 f 1 ? 3.4k 1% 1m v out gnd ntc timer 1-cell li-ion ltc4410 ltc4053 v in v cc bat gnd shdn usbp chp mode off on system power supply usb mode 500ma 100ma suspend ltc4410 mode 1 0 1 ltc4053 shdn 1 1 0 4.35v to 5.5v from usb 100ma 500ma 4410 ta01 irlml6401 prog features descriptio u applicatio s u typical applicatio u
2 ltc4410 sn4410 4410fs parameter conditions min typ max units operating v in range 4.35 5.5 v quiescent current?ctive 100ma mode (mode = low) 500 700 a 500ma mode (mode = high) 80 125 a chp compliance voltage mode = 5v, i vout = 500ma 0 4.0 v mode = 0v, i vout = 0ma 0 3.5 v reverse current v out = 4v, v in = 0v 1 5 a mode input current mode = 0v 0.1 5 a mode = 5v 0.1 5 a mode input high 1.2 v mode input low 0.4 v usbp output high 1m resistor to gnd, v in = 5v 4.8 4.98 v usbp output low 1m resistor to v in , v in = 3.5v 20 100 mv uvlo and usbp threshold measured on v in rising 4.05 4.2 4.35 v uvlo and usbp hysteresis measured on v in 80 100 120 mv chp output current mode = high, i vout = 0ma (note 2) 0 30 a mode = high, i vout = 500ma (note 2) 470 500 530 a mode = high, i vout = 500ma, t a 0 c, (note 2) 460 500 540 a mode = high, i vout = 500ma, t a < 0 c, (note 2) 450 500 550 a mode = low, i vout = 0ma (note 2) 370 a mode = low, i vout = 100ma (note 2) 430 470 510 a (note 1) v in , v out voltages ...................................... 0.3v to 6v usbp, mode, chp voltage ........................ 0.3v to 6v i vout (note 5) ............................................................ 2a operating ambient temperature range ltc4410e (notes 3, 4) ........................ 40 c to 85 c storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c absolute m axi m u m ratings w ww u package/order i n for m atio n w u u order part number ltc4410es6 s6 part marking ltk8 t jmax = 125 c, ja = 100 c/w to 150 c/w depending on pc board layout the denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = 5v unless otherwise noted. consult ltc marketing for parts specified with wider operating temperature ranges. v in 1 gnd 2 mode 3 6 v out 5 chp 4 usbp top view s6 package 6-lead plastic tsot-23 electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: current flows out of chp, voltage at chp = 0v. note 3: the ltc4410e is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the 40 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 4: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125 c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 5: based on long-term current density limitations.
3 ltc4410 sn4410 4410fs typical perfor a ce characteristics uw i ref turn-off response v in (v) 0 i ref ( a) 150 200 250 3 5 4410 g03 100 50 0 12 4 300 350 400 6 t a = 25 c mode pin chp current into a 3.4k resistor 0ma 0v 5v 1 s/div 4410 g01 370 a chp current into a 3.4k resistor 500ma load step 0ma 10 s/div 4410 g02 500 a 0ma 500ma chp current with i load step i ref vs v in (mode = 0) i ref vs v chp (mode = 0) r ds(on) vs v in v chp (v) 0 0 i ref ( a) 50 150 200 250 2 450 4410 g04 100 16 345 300 350 400 t a = 25 c v in (v) 4.2 170 172 176 4.8 5.2 4410 g05 168 166 4.4 4.6 5.0 5.4 5.6 164 162 174 r ds(on) (m ? ) t a = 25 c r ds(on) vs temperature temperature ( c) ?0 0 r ds(on) (m ? ) 50 100 150 200 250 ?5 02550 4410 g06 75 100 reverse current vs temperature i cc vs temperature temperature ( c) ?0 0 reverse current ( a) 0.5 1.5 2.0 2.5 5.0 3.5 ?0 20 40 4410 g07 1.0 4.0 4.5 3.0 ?0 0 60 80 100 temperature ( c) ?0 0 i cc ( a) 10 30 40 50 100 70 ?0 20 40 4410 g08 20 80 90 60 ?0 0 60 80 100
4 ltc4410 sn4410 4410fs v in (pin 1): positive input supply. when v in > 4.2v, the internal undervoltage lockout enables the main switch that connects v in to v out . bypass v in with a 10 f ceramic capacitor and a 1 ? resistor in series or use a 10 f capacitor with at least 1 ? minimum esr. this minimizes the voltage transient that can occur when the input is hot switched. gnd (pin 2): signal ground for the ltc4410. mode (pin 3): mode select input. this pin selects the maximum usb port current of either 100ma or 500ma. when mode is high, the current out of chp will be i vout / 1000. when mode is low, the current out of chp will be i vout /1000 + 370 a (typical). block diagra w thermal shutdown m2 1000 vb usbp m1 1 m3 370 a s1 mode chp r1 + ref 1.25v r3 r2 v in 1 3 5 v out 6 gnd 4410 bd usbp 2 4 + body switch + uu u pi fu ctio s usbp (pin 4): usb voltage present output. this pin goes high when v in exceeds the undervoltage lockout threshold (4.2v typical). chp (pin 5): charger program output. this pin sources a current that is used by the battery charger to control charge current. v out (pin 6): ltc4410 output. bypass this pin with a 10 f or larger x5r ceramic capacitor. this capacitor may be omitted if other circuitry connected to v out contains a bypass capacitor. when v out > v in , the internal switch is held off, resulting in very low battery drain current (1 a typical).
5 ltc4410 sn4410 4410fs operatio u the ltc4410 manages the total current consumption between a battery charger and a usb portable device. in a system using the ltc4410, a battery charger can be set up to charge at the maximum available current from the usb port without any need to reserve current for the device load. as the usb device current increases, the ltc4410 decreases the battery charge current so as not to exceed the maximum allowable current from the usb port. this allows for simultaneous battery charging and device operation. the ltc4410 can only reduce the bat- tery charge current to zero. it is the responsibility of the usb device load to not exceed the usb power limits. the ltc4410 uses an internal power mosfet to sense load current. this mosfet is held off when v out > v in or v in < 4.2v (typ). a replica of the i vout current equal to i vout /1000 is sourced out of the chp pin with an accuracy of 6%. this current can be summed into the prog node of a battery charger to reduce the charge current. the ltc4410 is primarily designed to interface with battery chargers that use a program pin to set the maximum charge current, with a charge current to program pin current ratio of 1000:1. the voltage on chp can be externally monitored to signal overcurrent conditions. when v in > 4.2v, the internal usb present comparator forces the usbp pin high. this signal can be used to detect when the usb voltage is present and drive an external switch to connect or disconnect a battery from the usb peripheral. the mode pin controls the state of an internal 370 a current reference (i ref ). when active (mode pin low), the total current sourced out of chp is i vout /1000 +i ref . the primary function of the current reference is to offset the battery charger charge current for 100ma mode. when mode is high, the current reference is disabled. the total current out of chp with mode high is i vout /1000. the mode controlled current offset makes it possible to con- figure the battery charger and the ltc4410 to support the usb specification 1.0 and 2.0 required 100ma and 500ma modes of operation. the low quiescent current (80 a, when mode is high) of the ltc4410 makes the system easily compliant with the usb specifications 1.0 and 2.0 suspend mode current consumption requirements. when v out > v in , the ltc4410 transitions to low power mode, draining 1 a (typical) from the lithium-ion battery. this condition occurs when the usb device is operating off of its internal battery and not connected to the usb port.
6 ltc4410 sn4410 4410fs applicatio s i for atio wu uu usb power management and wall adapter power with the addition of a few components, the ltc4410 allows for simultaneous device operation and battery charging while connected to usb port or wall adapter. the ltc4410 will proportionally reduce the battery charge current to keep the total current within the current rated for the wall adapter. figure 1 shows an example of how to combine the usb power and wall adapter inputs. a p-channel mosfet, mp1, is used to prevent back con- ducting into the usb port when a wall adapter is present. the pull-down resistor, r1, is to assure that mp1 is on when there is no wall adapter. the schottky diode, d1, is used to prevent usb power loss through r1. if the wall adapter used has more than 500ma capability, a resistor, r3, connected in parallel with r2 using n-channel mosfet mn1 will increase the charge current when the wall adapter is present. in this example the battery charge current is 340ma without the wall adapter (see the ltc4053 data sheet for details on how to program the battery charge current). when the wall adapter is present, the charge current is 750ma. 4.7 f 1 ? r1 1k d1 r3 4.87k 1% mn1 r2 3.4k 1% v out ltc4410 v in gnd usbp chp mp1 mode 100ma 500ma 4.35v to 5.25v from usb 5v wall adapter 750ma 0.1 f gnd ntc timer ltc4053 v in bat 1-cell li-ion shdn off on 4410 f01 prog 4.7 f 1m i load mp2 system power supply figure 1. usb power management and wall adapter power
7 ltc4410 sn4410 4410fs applicatio s i for atio wu uu c1 4.7 f c3 4.7 f c2 0.15 f r1 1 ? r3 2k r2 2k v out gnd ntc timer bat2 ltc4410 ltc4053 v in v in bat gnd shdn usbp chp mode off on 5v wall adapter 4410 f02 prog + + + c4 0.1 f gnd ntc timer bat1 ltc4053 v in bat shdn off on prog + figure 2. priority dual battery charging with wall adapter information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dual battery charging with priority the ltc4410 can be used to manage two battery chargers, giving one of the chargers (see figure 2) priority. when bat1 is being charged, the charge current is flowing through the ltc4410. the ltc4410 is sensing the current and sourcing a current equal to bat1 charge current/1000 out of chp. this effectively reduces the bat2 charger current. as bat1 current demands reduce, the current sourced out of chp is reduced, enabling bat2 to have more current. in this example the power supply is a 750ma minimum wall adapter, r prog (r2 and r3) for the charg- ers are 2k ? , resulting in a 750ma charge current. in this application, the total current out of the wall adapter will never exceed 750ma.
8 ltc4410 sn4410 4410fs linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2002 lt/tp 1203 1k ? printed in usa related parts part number description comments ltc1733 li-ion linear charger with thermal regulation standalone charger, no external mosfet, diode or sense resistor ltc1734 200ma to 700ma li-ion charger in thinsot tiny design, no blocking diode, no sense resistor ltc1734l 50ma to 180ma li-ion charger in thinsot tiny design, high accuracy for low charge current, no blocking diode, no sense resistor ltc4053 usb li-ion battery charger operates from usb port, 100ma/500ma charge capability, standalone charger ltc4054 800ma li-ion battery charger in thinsot standalone charger, thermal regulation, c/10 charge termination ltc4055 usb power controller and li-ion linear charger load dependent charging guarantees usb input current compliance, automatic battery switchover when supply is removed, tiny 4mm 4mm qfn package ltc4412 powerpath tm controller in thinsot more efficient than diode or?ng, automatic switching between dc sources, simplified load sharing, 3v v in 28v powerpath is a trademark of linear technology corporation. u package descriptio s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) 1.50 ?1.75 (note 4) 2.80 bsc 0.30 ?0.45 6 plcs (note 3) datum ? 0.09 ?0.20 (note 3) s6 tsot-23 0302 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref
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